J. Laskar, B. Matinpour, S. Chakraborty
At frequencies above 500 MHz, component sizes become comparable to the wavelength; for example, at 100 GHz, the optimum antenna size is only 1 mm2. Because of this, modern receiver front ends, including inductors, low-noise amplifiers, and the antenna, are made on a single monolithic silicon chip. Considerable ingenuity is required to design the entire front end into a SiGe or GaAs substrate to achieve low power consumption and good performance. The performance of such devices is typically quite modest; typically they are sensitive only to -100 dBm and have low IP3 points. This is partly the result of compromises necessitated by the use of the simpler direct conversion architecture instead of superheterodyne circuits, for which expensive filters with sharp cutoffs would be required. Because these receivers typically operate in the microwave region, around 5-10 GHz, additional challenges in obtaining good performance are in optimizing circuit layout to minimize parasitic inductances and capacitances, and overcoming the difficulty of building tiny inductors and transformers onto a silicon chip. This book describes how such chips are designed, first considering each section independently, and working up to a complete functional wireless system.
The authors also describe their novel techniques for eliminating the DC offset that occurs in direct conversion receivers when decoding QPSK modulated digital signals. The exposition is well thought out and logical. The illustrations are about equally divided between block and circuit diagrams.